The invention relates generally to semiconductor device fabrication and, in particular, to device structures for bipolar junction transistors, as well as fabrication methods for such device structures and design structures for BiCMOS integrated circuits.
Bipolar junction transistors are typically found in demanding types of analog circuits, especially analog circuits used in high-frequency applications. Bipolar junction transistors are found in radiofrequency integrated circuits (RFICs) used in wireless communications systems, as well as integrated circuits requiring high power efficiency, such as power amplifiers in cellular telephones, and other types of high speed integrated circuits. Bipolar junction transistors may be combined with complementary metal-oxide-semiconductor (CMOS) field effect transistors in bipolar complementary metal-oxide-semiconductor (BiCMOS) integrated circuits, which take advantage of the favorable characteristics of both transistor types.
Conventional bipolar junction transistors include three adjacent doped semiconductor layers or regions. A central region forms a base and two end regions form an emitter and a collector. A bipolar junction transistor includes a pair of p-n junctions, namely an emitter-base junction and a collector-base junction. In operation, the emitter/base junction is forward biased and the collector/base junction is reverse biased. Generally, a bipolar junction transistor can be operated as an amplifier or as a switch.
Improved device structures are needed for bipolar junction transistors that boost device performance, as well as improved fabrication methods for these device structures and design structures for BiCMOS integrated circuits.